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ESA collaborates with researchers from University of Bologna, Italy, and ETH Zürich, Switzerland, to develop a RISC-V CPU chip capable of handling HPC and AI processing during space exploration missions.The chip, named Occamy, is the outcome of the Parallel Ultra Low Power Platform project. Chip design began on April 20, 2021, with the first prototype released in July 2022. Covering an area of 72 mm2 and housing nearly 1 billion transistors, its layout resembles that of the 4-core Intel Sandy Bridge CPU released in 2011. The transistor die is mounted on a 52.5x45mm PCB, with a power supply capacitor system positioned above to power the processing chip.
European scientists devise a chip that enables ESA to break free from relying on ARM or x86 processing chips for space missions, while also enhancing computational performance and reducing processing time. The chip itself incorporates both modern and traditional techniques.
One of the modern techniques applied is chiplet design, combining logic compute silicon die with 2.5D HBM memory. The chip surface features two Micron HBM2E DRAM chips, each with a capacity of 16x2 GB. Each Occamy chip die consumes 10W of power at a frequency of 1000 MHz. On the chip surface are two logic processing dies and two HBM2e DRAM chips.The Occamy chip die is fabricated using the 12nm GF12LPP process from GlobalFoundry, known for producing low-power semiconductor chips. With the RISC-V instruction set architecture, the two chip dies together feature a total of 432 processing cores, delivering 0.768 TFlops FP64, 1.536 TFLOPs FP32, 3.072 TFLOPs FP16, and 6.144 TFLOPs FP8.According to WCCFTech
