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As extensively mentioned in prior articles, engineers from the world's top processor design corporations are actively seeking ways to ensure the continuity of Moore's Law into the future. One solution involves adopting chiplet designs with multiple dies on a single processing chip, shifting the focus from traditional transistor density increases to enhancing performance. This is precisely what AMD is currently implementing.
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Concerning Intel's objectives, they aim to stack processing chip dies, allowing for multiple layers of transistors within the same footprint. This approach enhances processing power while simultaneously reducing the chip's size. Intel seeks to integrate 3D stacked chip technology, known as Foveros, with chiplet design technology called EMIB (Embedded Multi-Die Interconnect Bridge).
Gary Patton, Vice President and Managing Director of Intel's Component Research and Design Division, stated: “75 years since the invention of the transistor, innovations continue to drive Moore's Law development, addressing human demands for computational performance. At the IEDM 2022 conference, Intel presented both new perspectives and specific research results to overcome current and future challenges, satisfying the demands for computational performance and keeping Moore's Law alive for many years to come.”Intel's component research engineering team has identified several new processes and materials capable of propelling Intel towards the milestone of 'trillions of transistors.' Other research indicates that Intel possesses designs utilizing these materials, with a thickness not exceeding the size of 3 molecules, incorporating a cache layer directly above the computational transistor layer.As per Techspot
